Current mirrors and active loads

Integrated and high-performance discrete amplifiers are biased with currents, not resistors. A current source holds a transistor's collector or drain current fixed whatever the voltage across it, which makes bias points predictable, sets the tail current of a differential pair, and, used as a load, gives a single stage a voltage gain in the thousands. The circuit that makes nearly every such current source is the current mirror: one transistor measures a reference current, and one or more matched transistors copy it. This lesson develops the basic mirror, its errors and its improved forms, the Widlar source for small currents, MOSFET mirrors, and the active load.

In the APS-2, Amara's differential receiver needs a 1 mA tail current that does not change when the microphone cable's hum swings the inputs up and down, and the power amplifier of lesson 12 needs a 10 mA current source for its voltage-amplifier stage. Both will be mirrors, so before choosing transistors she asks Leo to build one on the bench and measure how its output current changes with output voltage.

The basic BJT current mirror

The basic mirror uses two matched npn transistors with their bases and emitters connected together. Q1 is diode-connected, its collector tied to its base, so a reference current forced into it sets its V_BE. Q2 has the same V_BE, so, being identical, it carries the same collector current. The reference is usually a resistor from the supply: I_REF ≈ (V_CC − V_BE)/R. Two base currents are drawn from the reference, which leaves an error of about 2/β:

The output resistance matters as much as the current. An ideal current source has infinite output resistance; Q2 has its Early-effect resistance r_o2 = V_A/I_O, so its current rises slightly with its collector voltage. When the two collector voltages differ, the copy is in error even with infinite β, because Q1 sits at V_CE = V_BE while Q2 sits wherever the output node is:

Improved mirrors

Three refinements fix the basic mirror's errors. The beta-helper mirror adds an emitter follower that supplies the two base currents, so the reference loses only the follower's base current and the error falls from 2/β to about 2/β². The Wilson mirror adds a third transistor in a local feedback loop that both cancels the base-current error to second order and raises the output resistance to about βr_o/2. The cascode mirror stacks a second mirror on the first so that the output transistor's collector voltage is held nearly constant, raising the output resistance to about βr_o for BJTs and g_m r_o² for MOSFETs. The cost is headroom: each stacked transistor needs its own V_BE or V_CE(sat), so a cascode mirror needs about 1 V more across it before it stops behaving as a current source.

The Widlar source for small currents

Op amp input stages often run at 10 to 20 µA. A basic mirror from a 12 V supply would need a reference resistor near 1 MΩ, which wastes chip area and is hard to make accurately. The Widlar current source solves the problem by adding a small emitter resistor R_E to the output transistor only. Now the two transistors have different V_BE, and since collector current is exponential in V_BE, a small voltage difference gives a large current ratio:

MOSFET mirrors

A MOSFET mirror works the same way, with two advantages: the gates draw no current, so there is no β error, and the current ratio is set by the transistors' aspect ratios W/L, which a chip designer can choose freely. In saturation the copy is

Channel-length modulation, the MOSFET's version of the Early effect, plays the role of V_A: λ is larger for short channels, so analog designers use longer-than-minimum channel lengths in mirrors to raise r_o. The mirror's output transistor stays in saturation only while V_DS ≥ V_ov, the overdrive voltage V_GS − V_t; cascode MOSFET mirrors need about 2V_ov plus a threshold, and the wide-swing cascode variants reduce that to about 2V_ov, which matters on 3.3 V and lower supplies.

Matching and layout

A mirror is only as good as the match between its transistors. For BJTs, the collector current depends exponentially on V_BE, so a V_BE mismatch of ΔV_BE gives a current error of about ΔV_BE/V_T: only 1 mV of mismatch gives nearly 4 percent. Discrete designs therefore use dual transistors in one package, or add equal emitter resistors to both transistors so that a few hundred millivolts across the resistors swamps the V_BE difference; with 100 mV across each emitter resistor, a 1 mV mismatch causes only about 1 percent error. In integrated circuits, matched devices are placed close together, oriented the same way and arranged in common-centroid patterns so that gradients in temperature and doping across the chip affect both equally. Multiple outputs at different currents come from scaling: a transistor with twice the emitter area, or twice the W/L, carries twice the current.

Active loads

A common-emitter stage with a resistor load has a voltage gain limited by the DC voltage the resistor can drop. Since g_m = I_C/V_T,

so with 6 V across R_C the gain cannot exceed about 6/0.02585 ≈ 232, however the resistor and current are chosen. Replacing R_C by a pnp current source removes the limit, because a current source has a high incremental resistance but needs only a few tenths of a volt across it. The load is then r_op, and the gain becomes

The intrinsic gain V_A/V_T is about 3,900 for a transistor with V_A = 100 V, so a single actively loaded stage can give a gain of a thousand or more. The catch is that the output node is the junction of two current sources fighting each other: any small difference between the npn's current and the pnp's current drives the output toward one rail. An actively loaded stage therefore cannot set its own DC operating point and must be placed inside a feedback loop, or paired with a differential stage whose mirror forces the currents to agree, as the next lesson shows.

import math
VT = 0.02585
# Basic mirror with base-current and Early errors
def basic(VCC, R, beta, VA, VCE2, VBE=0.65):
    iref = (VCC - VBE) / R
    io = iref / (1 + 2 / beta) * (1 + VCE2 / VA) / (1 + VBE / VA)
    return iref, io, VA / io
for vce in (2, 6, 12):
    iref, io, ro = basic(12, 11.3e3, 150, 100, vce)
    print(f"basic mirror, VCE2 = {vce:2d} V: Iref = {iref*1e3:.3f} mA, Io = {io*1e3:.3f} mA, Rout = {ro/1e3:.0f} k")
# Widlar source: solve Io*RE = VT*ln(Iref/Io) for RE given Io, then check by iteration
iref, io_target = 1e-3, 10e-6
RE = VT / io_target * math.log(iref / io_target)
io = io_target * 2
for _ in range(50):                      # fixed-point iteration on the transcendental equation
    io = VT * math.log(iref / io) / RE
print(f"Widlar: RE = {RE/1e3:.2f} k gives Io = {io*1e6:.2f} uA")
ro, gm = 100 / io, io / VT
print(f"Widlar output resistance ~ {ro*(1+gm*RE)/1e6:.0f} M (plain ro = {ro/1e6:.0f} M)")
# Active load versus resistor load at the same current
I, VAn, VAp = 0.5e-3, 100, 50
gm = I / VT
ron, rop = VAn / I, VAp / I
Aact = gm * (ron * rop / (ron + rop))
Ares = gm * (6 / I)                      # resistor dropping 6 V
print(f"gm = {gm*1e3:.2f} mS; active load gain = {Aact:.0f} ({20*math.log10(Aact):.1f} dB); 6 V resistor load gain = {Ares:.0f}")

basic mirror, VCE2 =  2 V: Iref = 1.004 mA, Io = 1.005 mA, Rout = 100 k
basic mirror, VCE2 =  6 V: Iref = 1.004 mA, Io = 1.044 mA, Rout = 96 k
basic mirror, VCE2 = 12 V: Iref = 1.004 mA, Io = 1.103 mA, Rout = 91 k
Widlar: RE = 11.90 k gives Io = 10.00 uA
Widlar output resistance ~ 56 M (plain ro = 10 M)
gm = 19.34 mS; active load gain = 1289 (62.2 dB); 6 V resistor load gain = 232

The output confirms the hand calculations: the basic mirror's current rises with V_CE2 exactly as Leo measured, the Widlar resistor of about 11.9 kΩ gives 10 µA, and the actively loaded stage at 0.5 mA has a gain of about 1,290, more than five times what a resistor load can give with 6 V across it. The Widlar equation has no closed-form solution for I_O when R_E is given, which is why the code iterates; designers usually do what the example did and choose I_O first, then compute R_E directly.

Reference circuits

A mirror only copies; something must set the reference. A resistor from the supply gives a current proportional to V_CC − V_BE, so the current changes with the supply, which is poor for a battery-powered or loosely regulated product. Better references make the current depend on device properties instead. A V_BE-referenced source forces V_BE across a resistor, giving I ≈ V_BE/R, nearly independent of the supply but falling about 0.3 percent per kelvin as V_BE falls about 2 mV/°C. A PTAT (proportional-to-absolute-temperature) source uses two transistors at different current densities and puts their V_BE difference, V_T ln n, across a resistor, giving a current that rises with temperature. Adding a V_BE to a scaled PTAT voltage cancels the two temperature coefficients and gives the bandgap reference, about 1.2 V, the basis of most precision voltage references and regulators. The APS-2's converter reference and its regulators already contain bandgaps, so Amara uses simple resistor references for her discrete mirrors and accepts the supply sensitivity, because the 12 V rail is regulated.